## Mar 16, 2019

### On Jeff Bezos' billions.

It seems that most people do not understand difference between liquid money and capital when they speak about how much Jeff Bezos or Bill Gates can spend.

Imagine that you live in a $10'000'000 house and you have$5 in your pocket. How much can you spend? $5! You wouldn't spend$50'000 on a new car because to do this you would have to sell you fucking house!

It becomes even more interesting if this house is the source of your income and you have your $5 because you own the house. Would you waste$50'000 in this case?

Now imagine, that your house is such a significant part of the economy that attempt to sell a part of it would crash prices and you would lose much more than \$50'000 in your capital in attempt to raise the money.

Yes, these people are reach, but when you hear about their billions you should understand what it means in practice. Their billions is not piles of cash, but factories, data centers, warehouses, data on their servers, patents.

It is also should be understood, that somewhere at the bottom of the list of reach people there are some dictators and their friends, who have their money in cash! These people are really reach as they may spend their money as they wish. Not to mention that their money is not earned by creation of some valuable company, but forcefully taken from people/companies to the country's budget and then stolen from there.

## Mar 11, 2019

### HashDice - strong passwords that are easy to recover

How can we create passwords that are strong, easy to remember, easy to change and that are different for different places where you log in? Trying to solve this puzzle I came up with a method I call HashDice. In this piece I share it with you to improve your passwords or to hear explanation why the method is bad and should not be used.

## Oct 14, 2018

### Simple and efficient FPGA reset method (reset for records)

I hope you are using VHDL records extensively. They are not as powerful as SystemVerilog data types and interfaces, but it's a huge step forward from individual bits and bit arrays of Verilog. I don't understand why some people use VHDL and don't use this feature of VHDL! Records make your code significantly clearer and crisper. They reduce risk of forgetting to assign a value to a signal of a complex data bus and make your description 10 times shorter while improving readability.

## Jun 22, 2018

### Minimalistic resets coding style

I wanted to write a post about resetting signals of complex types, but I decided that I have to write two other ones to make sure that we are on the same page.

There is a nice document called Get Smart About Reset: Think Local, Not Global. If you haven't read it yet - do it. One of its points - eliminate as much unnecessary resets as you can.
My experience says me that resets cause big problems in big high speed designs, and I always try to reduce number of resettable registers.
But there is a trap. Let's consider this code (VHDL, but for Verilog all this works the same way):

 1 2 3 4 5 6 7 8 9 10 11 process(clk) is begin if rising_edge(clk) begin if rst = '1' then a <= '0'; else a <= somecode; b <= someothercode; end if; end if; end process;

## Jun 18, 2018

### Unsafe FPGA/ASIC neighbors

Do you remember Spectre/Meltdown? Unsafe code on your processor can indirectly access data in memory locations which should have been isolated from the code.
Similar things can happen in FPGA/ASIC world. It can be that your sensitive data (e.g. ciphering keys) are used in your IP and there is another (rogue) IP on the same device. For example, you bought an IP from a malicious vendor, or you are sharing a big FPGA with an attacker on some cloud infrastructure.
Despite that your IPs are logically separated, they share the power distribution network of the device and variation in power consumption of your core, correlated with your sensitive data can be sensed by the other core using signal propagation speed/voltage dependency.

More details in the article
An Inside Job: Remote Power Analysis Attacks on FPGAs

## Jun 14, 2018

### Features of for... loop in VHDL

If you didn't noticed, in my previous post I used "for" like "foreach" across enumerate type

 1 2 3 type LaneIndex is (L0,L1,L2,L3); ... for Lane in LaneIndex loop

In fact, you also can use it like that

for i in Arr'range loop
if Arr is an array.

Or you can use it like that:

 1 2 3 subtype LanesRange is integer range 0 to LanesInCore-1; ... for Lane in LanesRange loop
Highly recommend!

## Jun 13, 2018

### Special index types of VHDL arrays

Actually, in VHDL your array don't have to have integer indexes.

 1 2 type ByteIndex is (B0,B1,B2,B3); type LaneType is array (ByteIndex) of std_logic_vector(7 downto 0);

I used this fact when I had to use multidimensional arrays to prevent mistakes when you mix up dimensions of your arrays.
For example, let's suppose you have a bus, consisting of 4 lanes and each of the lanes contains 4 bytes.

 1 2 3 4 5 6 7 8 type LaneType is array (0 to 3) of std_logic_vector(7 downto 0); type LaneBusType is array(0 to 3) of LaneType; ..... for Lane in 0 to 3 loop L(Lane)(0)(i) <= not L(Lane)(0)(i); --OK -- L(0)(Lane)(i) <= not L(0)(Lane)(i); -- error, but absolutely legal end loop;

In contrast, if you use non-integer indexes:

 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 type LaneIndex is (L0,L1,L2,L3); type ByteIndex is (B0,B1,B2,B3); type LaneType is array(ByteIndex) of std_logic_vector(7 downto 0); type LaneBusType is array(LaneIndex) of LaneType; signal clk : std_logic; signal L : LaneBusType := (others => (others => (others => '0'))); begin process is begin clk <= '0'; wait for 5 ns; clk <= '1'; wait for 5 ns; end process; process(clk) is variable i : natural := 0; begin if rising_edge(clk) then for Lane in LaneIndex loop L(Lane)(B0)(i) <= not L(Lane)(B0)(i); --OK -- L(B0)(Lane)(i) <= not L(B0)(Lane)(i); -- type error near b0 ; current type byteindex; -- expected type laneindex end loop; i := (i+1) mod 8; end if; end process;

The method helps you to avoid mistakes by controlling types of indexes. On the other hand, it adds some hassle. It is up to you when to use it.

### How to save your plants, while you are away from your home

There is a simple and efficient trick to save your plants while you cannot water them. The trick uses Capillary action.

All you need is an old towel (or another peace of cloth) and a big bowl. You place your plants around the bowl with water, cut your cloth on ribbons and dip one ends of each ribbon to the bowl and cover soil in your pots with the other ends of the ribbons.

Ends of the ribbons should reach the bottom of the bowl and there must be plenty of water in it, as plants consume it a lot! What you see on the photo is what left after a week of absence during cold, cloudy weather. There was more than a half of the bowl of water a week ago.

Pebbles and shells in the middle of the bowl are just for aesthetics reasons and have no purpose.

I must tell you that each time when I am back the plants look much healthier then before I left them. I am even thinking about installing of a some sort of drip irrigation system for them.

Of course, you can just use one of this self watering planters, but I think it is cheating. :)

## May 24, 2010

### Slovio

А вот есть такой язык, который без перевода понятен и Русскому и Украинцу и Белорусу и Чеху и Поляку и Словаку...

Што ес "Словио"? "Словио" ес новйу межународйу йазика ктор разумийут чтирсто милион лудис на целойу земла. "Словио" можете употребит дла гворение со чтирсто милион славйу Лудис от Прага до Владивосток; от Санкт Петербург через Варшава до Варна; от Средземйу Морие и от Северйу Морие до Тихйу Океан. "Словио" имайт простйу, логикйу граматиа и "Словио" ес идеалйу йазика дла днесйу лудис. Учийте "Словио" тпер!

Пред тисич рочис все Славианис имали однакйу йазика. Услед разпрестрение Славианифс на огромйу областис из тот йазика творили болш чем дванадес диалектис, и услед различйу културйу обвливениес, кажд Славианск диалект творил свои способ писаниеф. Поскроз различйу писание, различйу азбуквас и различйу диалектис до не-давност Славианис разумили друг другуф.
http://www.slovio.com/

А вот в этом сообществе предлагают модификации этого языка, на мой непрофессиональный взгляд - довольно разумные. http://community.livejournal.com/slovio/

## Jan 24, 2010

### ubuntu 9.10

спасибо тем, кто исправил звук в 9.10!
Наконец-то работает громко и не тупит при изменении громкости.

## Jan 12, 2010

### И.С.Бах Хорал

Из "Самоучитель игры на аккордеоне" (автор Лондонов)
Написано, что это Хорал Баха.

В интернетах я такого хорала не нашёл. Ни нот, подтверждающих авторство, ни, тем более, записи исполнения (её изначально и искал).
Если есть у кого-то мысли где искать, помогите.

### Коты

Моя люимая вылепила трио котов.
Это они ещё не обожжёные после покраски, поэтому пока бесцветные.

## Dec 20, 2009

### Практика функционального программирования

Вышел третий номер журнала. fprog.ru